Understanding FET Logic

11/29/2022

The most basic element of the discrete computer I plan to build is the transistors. Every component I build will utilize logic gates that are composed of these transistors. The following post will explain the basics of transistor operations and implementation in gates.

A transistor is a semiconductor device that includes three gates (or channels) that functions as an amplifier or a switch. Transistors can come in the form of BJTs (Bipolar Junction Transistors) or FETs (Field Effect Transistors). The BJT is essentially a current controlling switch, with a Base node, Emitter node, and a Collector node. The FET on the other hand is a voltage controlled device with a Gate node, a Source node, and a Drain node. The MOSFET (Metal Oxide FET) is a type of FET that functions similarly to a basic FET with the exception of an oxide insulating layer, which increases the input impedance of the device. High input impedance decreases the current drawn at the gate of the transistor decreasing both power consumption, and creating less loss when cascading the devices. I chose N Channel MOSFETs for their lower power consumption and lower hardware requirements (as gates do not need resistors for current control).

Understanding MOSFETs as a Switch

Understanding P and N Type Semiconductor Materials

The basic layout of a MOSFET device utilizes both P and N type materials. From a a chemistry perspective N type material and P type material are created by doping (injecting) different elements into a group 4 element such as silicon. P type semiconductor material dopes silicon with a group 3 element such as boron which is termed as an acceptor impurity. The group 3 element combines with the Silicon atom, which results in a valence electron shell (outermost electrons) with seven electrons. Since each compound is most stable with 8 valence electrons the compound “wants” more electrons resulting in a positive charge known as a hole. On the other hand, N type semiconductor materials dopes silicon with a group 5 element known as a donor impurity. When this occurs the compound has nine valence electrons instead of the optimal eight resulting in the ejection of a free electron. The most important take home message of these two types of materials is that N-type materials has an excess of free electrons, while the P type material contains free holes (positive charge).

N Channel MOSFET Transistors

A MOSFET (Metal Oxide Semiconductor Field Effect Transistor) device is capable of switching between two states by utilizing P type material, N type material, a metal and an oxide. The N-channel MOSFET includes a gate (denoted as G), a source (denoted as S) and a Drain (denoted as D). As explained a little later the gate controls the state of the MOSFET similar to a mechanical switch that enables or disables current flow between source and drain.

When a positive voltage (at a voltage higher than the intrinsic drop from G to S; VGS) is applied to the gate the holes move toward the base of the metal material and electrons toward the top. The holes are not able to pass the oxide due to its chemical properties. This creates an Electric field in the P material essentially “pushing” holes down through the material creating an n-type bridge that links the Source and Drain.

Current can flow across the n channel bridge between the source and drain circuit, when a strong enough potential is applied across the source/drain circuit. In digital logic this is used to redirect the voltage to ground constituting a low state (explained in a little in more detail below). The P-Channel MOSFET works similarly except the n type material and p type material are swapped. This essentially means holes are manipulated to generate current instead of electrons. In a practical sense this simply means the biasing scheme is inverted, so it is activated by a negative potential, and current moves the opposite direction. Of course the actual operation is more complicated than this but this simplified explanation is sufficient in the explanation of MOSFETs for the use in discrete systems:

MOSFETs as a Switch in a Discrete Circuit

The variables used in analysis of MOSFETs are Vgs (voltage from gate to source), Vth (Vgs threshold or on voltage), Vds (Voltage from drain to source), and Vds_sat (saturated voltage from drain to source).

Transistors are used in an electrically analogous way to the switching of a household light switch. In this analogy your hand is comparable to the voltage at the gate, which affects the state of the transistor (similar to how the hand changes the state of the light). When the voltage at the gate does not exceed Vgs the transistor is in a “cutoff” state disallowing current flow between the source and drain. Alternatively when the voltage at the gate exceed Vgs the current can flow creating an on state. This allows the creation of logic gates that are at the core of every computer, and will be the main component utilized in the creation of my computer. There are three basic operation modes of the N-MOSFET:

Cutoff Mode: Vgs<Vth : No current is allowed to flow from source to drain

Ohmic Mode or Linear Mode: Vgs>Vth and Vds<Vds_sat : n-type bridge is partially formed, and it connects the two n type materials and increases in Vgs cause increase in the current

Saturation Mode: Vgs>Vth and Vds>Vds_sat : Bridge is fully formed and changes in Vds will have no effect on current. This is the optimal operation mode for the MOSFET

The MOSFETs I will utilize in my circuits are 2n7000s, an N channel enhancement mode MOSFET (and complimentary P channel BS250s will be used when creating tristate buffers using CMOS logic, which will be explored in a later post). I chose this transistor because the switching voltage (Vth) at the gate is around 3 volts. Anything above this value is in the on state (1) and anything below this value is the off state (0). Utilizing a 5V power source 3V is a good switching voltage. Additionally this transistor has a maximum voltage of 60V which is well within the limits of my application.

NOT Gate using transistors

The NOT gate is one of the simplest logic gates that take a single input that is either in a high state (>3V corresponding to logical 1), or a low state (<3V corresponding to logical 0). The gate functions by inverting the signal (1 becomes 0, and 0 becomes 1). The basic truth table (a tabular means of displaying outputs of a circuit as a function of inputs) for this type of gate is shown below:

The transistor configuration below represents a NOT logic gate. When the signal at the gate is 1 (>3V) the FET allows current to flow and the voltage follows the path of least resistance to ground. This means the voltage flowing through the output will be 0 (low). In the other case in which the signal at the gate is low (<3V) current is not able to flow across the transistor, so instead the 5V travels directly to the output. (high)

NAND Gate using transistors

The next simplest gate to design is the NAND gate. A NAND gate works by taking in two inputs (A and B) and outputting 1 in every case except when A=1 and B=1. In this way it acts as an inverted AND gate. The truth table for this type of gate is as follows:

The MOSFET circuit architecture for a NAND gate works by placing two N channel FETs in series as shown below. When either of the signals (or both) at the gates are 0 (<3V) the transistors are in the cutoff state and current is not allowed to pass. This means that the voltage cannot move to ground and the signal seen at the output is 5V (high). In the case in which both of the gate signals are 1 (>3V), current flows through both transistors and the voltage is connected to ground. This results in 0V (low) seen at the output. The NAND gate is utilized often in my designs as it only uses two transistors, and can be used to make a variety of other gates.

Creating other gates utilizing NOT and NAND Gates

Another gate that is used often is an AND gate. This gate only outputs high when both inputs (A and B) are high, and in any other state it will output low. This is often thought of as a multiply operation (A*B), because if A or B is 0 the output is 0 (like multiplying by 0), and if A and B is 1 the output is 1 (like 1*1). Practically the AND gate is helpful in applications such as a clock enable signal where the clock is only output when the enable is high AND the clock is high. This gate be visualized according to the following truth table:

When analyzing the truth table for the AND gate it is important to note that an AND gate is just the inverted output of the NAND gate. Because of this the AND gate can be designed using a NAND gate followed by a NOT gate according to the circuit topography below:

Another important gate is the OR gate. This gate outputs 1 as long as any of the inputs are 1, and outputs 0 only in the case that A=0 and B=0. This is often thought of as an add operation where 1+0=1, 1+1=1, and 0+0=0. In practice the OR gate essentially checks if either (or both) of the inputs are high. This logic can be visualized according to the following logic table:

When analyzing the truth table, and comparing to the NAND gate it can be observed that when the A and B signals are inverted for the OR gate, the logic is identical to the logic for the NAND gate. This means that the OR gate can be designed by placing a NOT gate at both the inputs of a NAND gate as shown below:

Although there are many other arrangements and gates that can be created with FETs I will analyze them further as they come up as I go through the project. For now the four gates discussed are sufficient for understanding basic discrete logic that dictates the bottom level behavior of a computer that will be discussed in future posts.